1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an In-Plane Switching (IPS) mode LCD device to prevent the distortion of a transverse electric field by a pixel electrode and a common electrode overlapped with each other.
2. Discussion of the Related Art
Recently, a liquid crystal display (LCD) device has been actively studied and researched owing to advantageous characteristics, such as high contrast ratio, great gray level, high picture quality and low power consumption. Especially, the LCD device is suitable for ultra-thin display device, such as a wall-mountable television. The LCD device has attracted great attention as a new display device that can substitute for a CRT in that the LCD device has thin profile, lightness in weight and low power consumption. As a result, the LCD device is used for a display device of a notebook computer operated by a battery.
Generally, the LCD device has various modes according to the properties of liquid crystal and pattern structures. More specifically, the LCD device is categorized into a Twisted Nematic (TN) mode of controlling liquid crystal directors by applying a voltage after arrangement of liquid crystal directors twisted at 90°, a multi-domain mode of obtaining a wide viewing angle by dividing one pixel into several domains, an Optically Compensated Birefringence (OCB) mode of compensating a phase change of light according to the progressing direction of light by forming a compensation film on an outer surface of a substrate, an In-Plane Switching (IPS) mode of forming a transverse electric field parallel by forming two electrodes on any one substrate, and a Vertical Alignment (VA) mode of arranging a longitudinal (major) axis of liquid crystal molecule vertical to a plane of an alignment layer by using negative type liquid crystal and a vertical alignment layer.
Among them, the IPS mode LCD device includes a color filter array substrate, a thin film transistor TFT array substrate, and a liquid crystal layer. At this time, the color filter array substrate and the thin film transistor array substrate are positioned opposite to each other, and the liquid crystal layer is formed between the two substrates. The color filter array substrate includes a black matrix layer for preventing light leakage, and an R, G and B color filter layer for realizing various colors on the black matrix layer. Also, the thin film transistor TFT array substrate includes gate and data lines intersecting each other to define a pixel region, a switching device formed at an intersection point of the gate and data lines, and common and pixel electrodes alternately formed to generate a transverse electric field.
Hereinafter, a related art IPS mode LCD device will be described with reference to the accompanying drawings. FIG. 1 is a plane view of a related art IPS mode LCD device. FIG. 2 is a cross sectional view along I-I′ of FIG. 1.
Referring to FIG. 1 and FIG. 2, a related art IPS mode LCD device includes a thin film transistor array substrate 11. On the thin film transistor array substrate 11, a gate insulating layer 13 is interposed between a gate line 12 and a data line 15, wherein the gate line 12 intersects the data line 15 at right angles to define a unit pixel region. Also, a thin film transistor TFT is formed at the intersection point of the gate line 12 and the data line 15.
The thin film transistor TFT is comprised of a gate electrode 12a, the gate insulating layer 13, a semiconductor layer 14, and source and drain electrodes 15a and 15b. In this case, the gate electrode 12a diverges from the gate line 12, and the gate insulating layer 13 is formed on an entire surface of the thin film transistor TFT array substrate 11 including the gate electrode 12a. The semiconductor layer 14 is formed on the gate insulating layer 13 above the gate electrode 12a. Then, the source and drain electrodes 15a and 15b, diverging from the data line 15, are overlapped with both sides of the semiconductor layer 14.
Each pixel region includes a common line 25, a common electrode 24 and a pixel electrode 17. The common line 25 is formed in parallel with the gate line 12 inside the pixel region. The common electrode 24 is diverged from the common line 25, wherein the common electrode 24 is comprised of a first common electrode part 24a and a second common electrode part 24b. Also, the pixel electrode 17 is connected with the drain electrode 15b of the thin film transistor TFT through a passivation layer 16, wherein the pixel electrode 17 is comprised of a first pixel electrode part 17a and a second pixel electrode part 17b. 
In this case, the common electrode 24 divides the pixel region into a plurality of blocks. In addition, the pixel electrode 17 divides each block to a plurality of sub-blocks. Accordingly, the sub-block has the corner of the pixel electrode 17 formed in shape of ‘’ or ‘’, and the corner of the common electrode 24 formed in shape of ‘’ or ‘’. That is, the sub-block is formed in shape of a diamond having the corners of the first and second pixel electrode parts 17a and 17b and the first and second common electrode parts 24a and 24b. In this state, a transverse electric field generates in each of the sub-blocks by the electrodes.
The second pixel electrode part 17b is overlapped with the common line 25, thereby generating a storage capacitance. Accordingly, it is possible to maintain a voltage charged in a liquid crystal capacitor during a turn-off block of the thin film transistor TFT. In the first common electrode part 24a, the outermost common electrode 50 of the pixel region is formed in the edge of the data line 15, thereby preventing the light leakage by preventing the distortion of electric field in the circumstance of the data line 15.
In case the outermost common electrode 50 is formed in the margin of the pixel region and the pixel electrode 17 is formed to define the sub-pixels, as shown in FIG. 1, the first pixel electrode part 17a may be overlapped with the outermost common electrode 50. However, as shown in FIG. 2, if the pixel electrode 17 is overlapped with the outermost common electrode 50, an equipotential may generate between the outermost common electrode 50 and the common electrode 24 when the transverse electric field generates between the pixel electrode 17 and the common electrode 24 in the pixel region. As a result, the transverse electric field may be distorted due to the equipotential generated between the outermost common electrode 50 and the common electrode 24. Accordingly, liquid crystal molecules are not aligned in the desired direction due to the distortion of the electric field, thereby lowering the picture quality.
When forming the sub-blocks of odd or even number in state of forming the outermost common electrodes at the both sides of the pixel region, if the pixel electrode is partially overlapped with the outermost common electrodes, the electric field of the pixel electrode may be distorted due to the outermost common electrode. The distortion of the electric field may occur between the pixel electrode and the common electrode inside the pixel region, as well as between the outermost common electrode and the pixel electrode.